Announcing Shader Model 6.10 Preview and AgilitySDK 720 Preview - DirectX Developer Blog

Today, we are pleased to announce that Shader Model 6.10 and other features have been officially released with Agility SDK 1.720-preview and complementary DXC 1.10.2605.2. AgilitySDK 1.720-preview exposes the following features. There’s more detail further below, including download and driver links.
See Appendix > Feature Support for the full table of each feature’s supported hardware.
Shader Model 6.10 introduces a set of Matrix APIs covering a broad swath of use cases. Collectively the feature is called LinAlg (short for Linear Algebra).
We’ve written a dedicated a blog post covering the feature in depth here.
Also see the GDC 2026 blog putting this feature in context of the overall ML story for DirectX here.
HLSL Spec: hlsl-specs/proposals/0035-linalg-matrix.md at main · microsoft/hlsl-specs
Shader Model 6.10 introduces two new intrinsics, GetGroupWaveIndex() and GetGroupWaveCount(), that give compute, mesh, amplification, and node shaders direct knowledge of wave-level structure within a thread group. GetGroupWaveIndex() returns the current wave’s index (0 to N-1) and GetGroupWaveCount() returns the total number of waves executing the group. These enable wave-level work specialization and cooperation without relying on unsafe workarounds like dividing SV_GroupIndex by WaveGetLaneCount(), which is not guaranteed to be correct across all hardware. A single code path now works portably across all wave sizes.
HLSL Spec: hlsl-specs/proposals/0048-group-wave-index.md at main · microsoft/hlsl-specs
Shader Model 6.10 lifts the longstanding 32 KB (28 KB for mesh shaders) cap on groupshared memory by exposing the actual hardware limit through a new runtime query, MaxGroupSharedMemoryPerGroup. Shader authors can use a new [GroupSharedLimit(<bytes>)] entry-point attribute to declare the maximum shared memory their shader requires, giving the compiler a compile-time portability check while still allowing access to the full capacity of modern GPUs. Shaders that omit the attribute continue to be validated against the legacy limits, so existing code is unaffected. This unlocks algorithms like large tile culling, software rasterization bins, and big matrix workloads that were previously constrained by the spec rather than the hardware.
HLSL Spec: hlsl-specs/proposals/0049-variable-groupshared-memory.md at main · microsoft/hlsl-specs
TriangleObjectPositions() is an intrinsic that can be called from an Any hit or Closest hit shader or RayQuery to obtain the positions of the vertices for the triangle that has been hit.
Spec: https://github.com/microsoft/hlsl-specs/blob/main/proposals/0041-triangle-object-positions.md
ClusterID() is an intrinsic that can be called from an Any hit or Closest hit shader or RayQuery to return the user defined ID of a cluster. This isn’t currently useful since clustered geometry support for DXR isn’t ready yet.
HLSL Spec: https://github.com/microsoft/hlsl-specs/blob/main/proposals/0045-clustered-geometry.md
D3D12 Raytracing spec with work-in progress clustered geometry design (not shipped yet): https://github.com/microsoft/DirectX-Specs/blob/master/d3d/Raytracing2.md
Once the features in this spec ship (tentatively starting with a preview fall 2026), the ClusterID() intrinsic will become useful.
D3D12’s legacy CopyBufferRegion, ClearUnorderedAccessViewFloat/Uint, ResolveSubresource, and similar commands all execute strictly in series because the old ResourceBarrier model has no way to express a dependency between two operations of the same type (e.g. copy-dest to copy-dest). This means the GPU stalls between every sequential copy or clear, even when the operations touch completely independent memory. The Batched Async Commands feature addresses this by introducing new command list methods that remove the implicit serialization contract, allowing the driver and hardware to overlap independent work within a single batch call. Developers opt into explicit synchronization using enhanced barriers only where true data hazards exist – such as when two copies write to overlapping regions of the same buffer – and everything else runs concurrently.
The feature also modernizes clears with ClearTextureSubresources, which clears textures directly by resource pointer and format – no RTV, UAV, descriptor heaps, or special resource flags required. This is notably the first D3D12 clear that works on block-compressed formats. Correspondingly, FillBuffers adds batched, format-aware or raw-pattern buffer fills with configurable repeat counts, replacing the descriptor gymnastics of UAV clears. In addition, new ClearBoundRenderTargetViews and ClearBoundDepthStencilView commands further improve ergonomics by operating on currently bound targets, enabling mid-render-pass clears and batch clearing multiple RTVs in a single call.
PIX supports all features released here. See the PIX release blog: https://devblogs.microsoft.com/pix/pix-2604-27004-preview/
Using the latest drivers linked in Overview > Hardware Support:
Supports default memory limit size only. Higher size limits are planned for future driver releases.
Values differ across hardware.
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Why isn’t Matrix AI, ray tracing, and noise correction supported on the RX 7000 series? It’s ridiculous. These cards have only been out for 2.5 years; if support is discontinued this early, there’s a problem. Also, why aren’t features that the RX 6000 series could have, even without AI, listed? AMD will lose users if they do this. I’ll buy an Nvidia card next time just because of this. I hope AMD gives up on this stubbornness. Please pass this on to AMD.
FYI, there is a typo on the AgilitySDK download page. Showing the release date in the D3D12SDKVersion box, not 720.
a question from a non software engineer in theory would DX Linear Algebra make it possible to have a ml upscaler that used ml hardware of both nvidia and amd, but be vender neutral in its implementation?
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